US Patent 7741882 Current-limited output buffer

An output buffer circuit includes a first output transistor having a source terminal connected to a voltage supply and a drain terminal connected to an output node. The first output transistor is capable of coupling the output node to the voltage supply when the input signal is at a high voltage in the input voltage range. The circuit also includes a second output transistor having a drain terminal connected to the output node and a source terminal connected to ground. The second output transistor is capable of coupling the output node to ground when the input signal is at a low voltage in the input voltage range. The circuit further includes a current-limiting circuit coupled to a gate terminal of the first output transistor and capable of limiting a current flowing through the gate terminal when the first output transistor is turned on. The output node outputs an output signal in an output voltage range, wherein a high voltage of the output voltage range exceeds the high voltage of the input voltage range.