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US Patent 7745290 Methods of fabricating semiconductor device including fin-fet

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Patent
Patent

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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7745290
Date of Patent
June 29, 2010
Patent Application Number
11773372
Date Filed
July 3, 2007
Patent Primary Examiner
‌
Charles D. Garber
Patent abstract

A method of fabricating a semiconductor device including a fin field effect transistor (Fin-FET) includes forming sacrificial bars on a semiconductor substrate, patterning the sacrificial bars to form sacrificial islands on the semiconductor substrate, forming a device isolation layer to fill a space between the sacrificial islands, selectively removing the sacrificial islands to expose the semiconductor substrate below the sacrificial islands, and anisotropically etching the exposed semiconductor substrate using the device isolation layer as an etch mask to form a recessed channel region. The recessed channel region allows the channel width and channel length of a transistor to be increased, thereby reducing the occurrence of short channel effects and narrow channel effects in highly integrated semiconductor devices.

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