Patent attributes
Circuits for merging data streams in a self-timed programmable integrated circuit. A programmable integrated circuit includes interconnected logic blocks, each including a logic circuit and an output multiplexer circuit including an arbiter and a multiplexer. Each arbiter is coupled to receive ready signals provided with first and second outputs of the logic circuit. Each multiplexer has first and second data inputs coupled to the outputs of the logic circuit, a select input programmably coupled, in one of a plurality of operating modes, to an arbiter output, and a data output coupled to an output of the logic block. The output multiplexer circuit provides an output token only when a first token indicates valid new data on the arbiter output and a second token indicates valid new data on one of the data inputs, and stores a third token received on the other data input until the other data input is selected by the multiplexer.
