US Patent 7747975 Timing violation debugging inside place and route tool

A storage medium for use in a computer to develop a circuit design. The storage medium recording a software tool that may be readable and executable by the computer. The software tool generally includes the steps of (A) receiving a first user input that identifies a specific cell of a plurality of existing cells in the circuit design, the specific cell having a timing characteristic, (B) generating a replacement display corresponding to the specific cell, the replacement display comprising a plurality of alternate cells suitable to replace the specific cell, each of the alternate cells having a different value associated with the timing characteristic of the specific cell, (C) receiving a second user input that identifies a replacement cell of the alternate cells and (D) automatically generating a first engineering change order to replace the specific cell with the replacement cell.