US Patent 7752411 Chips providing single and consolidated commands

In some embodiments, a chip includes a link interface, monitoring circuitry to provide an activity indicator that is indicative of activity of the chip, and scheduling circuitry to schedule commands. The chip also includes mode selection circuitry to select a first mode or a second mode for the scheduling circuitry depending on the activity indicator, wherein in the first mode the scheduling circuitry schedules certain commands as separate single commands and in the second mode the scheduling circuitry schedules at least one consolidated command to represent more than one of the separate single commands. Other embodiments are described.