Patent attributes
To present a logic description library of differential input circuit capable of expressing logically, in a differential input circuit, by including an input and output response characteristic depending on the voltage level of individual differential input signals in addition to an input and output response characteristic depending on the differential voltage between differential input signals. A logic description library 1a includes first detection logic primitive DPR1 and output control logic primitive OPR. A tristate buffer TBF functions as a buffer when first detection signal IS1 is at low level, and is controlled in a floating state when first detection signal IS1 is at high level. When at least either positive side logic input signal DINP or negative side logic input signal DINM is at undefined level, the first detection signal IS1 issued from inverter INV3 is at undefined level. Hence, output expectation value DOUT issued from output control logic primitive OPR is at undefined level.
