Patent 7763942 was granted and assigned to AU Optronics on July, 2010 by the United States Patent and Trademark Office.
A pixel structure and a fabrication method thereof are provided, wherein a semiconductor pattern and a data line are defined simultaneously by performing a half-tone or grey-tone masking process. In addition, a self-alignment manner is further adopted to fabricate a lightly doped region with symmetric lengths on two sides of a channel region through steps such as photoresist ashing and etching, so as to prevent the problem of misalignment of mask generated when a mask is used to define the lightly doped region in the conventional art. Furthermore, a source pattern and a drain pattern are made to directly contact a source region and a drain region of the semiconductor pattern, such that a process of fabricating a via is omitted. Besides, in the present invention, a common line pattern surrounding the peripheral of the pixel region is also formed to improve the aperture ratio of the pixel structure.