US Patent 7768315 Multiplexor with leakage power regulator

A circuit for a multiplexer includes a pair of NAND gates with outputs coupled to an OAI gate constructed from a complementary circuit formed from solid state devices. A current flow controller formed from solid state devices is coupled to one of the NAND gates. When activated the controller inhibits the flow of current through the NAND gate and a portion of the OAI gate to which the controller is connected. As a consequence, leakage power is not consumed within the multiplexer. Several of the applications in which the circuit is used are also demonstrated in the specification.