US Patent 7778267 Bus system

A bus system for providing a common data transmission path for N data sources that have M data bits. The N data sources are connected to M interconnections correspondingly through N bus cells each of which includes logic circuits for selectively providing the data bits of data sources into the interconnections. The bus cells are controlled to connect each of the data bits of the data sources to the selected one of the interconnections. The bus system is capable of adapting to delay times or loads of the data sources. The bus system reducing the number and the length of the interconnections.