US Patent 7783815 High latency interface between hardware components

A hard disk controller comprises a first circuit that transmits a first signal to control data transfer between the hard disk controller and a read/write channel. A second circuit transmits or receives data under control of the first signal. A third circuit transmits a second signal to control data transfer between a storage media and the read/write channel. A mode circuit transmits mode data under control of the second signal. A read channel circuit comprises a data circuit and a first circuit that receives a first signal that controls the transfer of data to and from the data circuit. A second circuit transmits or receives data under control of the first signal. A mode circuit receives mode data under control of a second signal. Data is transferred to and from the input/output circuit in accordance with the second signal.