Patent attributes
A method of forming a metal line in a semiconductor device is disclosed. The method of forming a metal line in a semiconductor device includes forming an interlayer insulating film over a substrate. A via hole may be formed by selectively patterning the interlayer insulating film. A metal film may be formed over a surface of the interlayer insulating film including an inner portion of the via hole. The inner portion of the via hole may be filled with copper. A copper layer exposed over the surface of the interlayer insulating film may be deplated using reverse current to form a copper metal line and a recess region over the copper metal line. An upper insulating film may be formed over the surface of the interlayer insulating film including the recess region by deposition. An insulating cap layer may be selectively formed over only the recess region on the copper metal line by etching the upper insulating film. The upper insulating film and the insulating cap layer may be made of a compound selected from a group including SiN, SiCN and SiOC. An upper insulating film may be deposited over the surface of the interlayer insulating film using a thermal deposition method or a plasma deposition method.
