Patent attributes
A semiconductor integrated circuit includes a flipflop holding and outputting input data according to a clock, the flipflop having: an input end to which data is input; an output end from which data is output; a first logic gate connected between the input end and the output end, the first logic gate operating according to the clock; a second logic gate connected between the first logic gate and the output end, the second logic gate operating according to the clock; and a buffer circuit. An input of the buffer circuit is connected to a node between the first logic gate and the input end. An output of the buffer circuit is connected to a node in an output side of the first logic gate. The buffer circuit transitions according to an enable signal from a high impedance state to a state in which a signal can be transmitted.
