US Patent 7797596 Method for monitoring and adjusting circuit performance

A method for testing an integrated circuit implemented in an electronic system. The method includes placing an integrated circuit (or portion thereof) that is implemented in an operational system (e.g., in a computer system) in an offline status. An electrical parameter of the integrated system (e.g., a voltage, clock frequency, etc.) is set, and a built-in self-test (BIST) is conducted. Any failures that occur during the BIST are recorded. Testing is then repeated for each of a plurality of predetermined values of the electrical parameter, recording any failures that occur. Once testing is complete a failure rate/range is determined for each of the predetermined values.