Patent attributes
A thin film transistor array substrate and a fabricating method thereof are disclosed. First, a substrate is provided. A patterned transparent conductive layer is then formed on the substrate. Next, a patterned first metal layer is formed to form a plurality of scan lines and a plurality of gates. Thereafter, a gate insulation layer is formed over the substrate. Moreover, a patterned semiconductor layer is formed to form a channel layer above the gates. The semiconductor layer is patterned with the same mask as that for patterning the transparent conductive layer. Additionally, a patterned second metal layer is formed to form a plurality of data lines, a plurality of sources, and a plurality of drains. After that, a dielectric layer is formed over the substrate. Finally, pixel electrodes are formed on the dielectric layer.
