Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Hirofumi Inoue0
Takeshi Kamigaichi0
Date of Patent
September 21, 2010
0Patent Application Number
121087830
Date Filed
April 24, 2008
0Patent Citations Received
Patent Primary Examiner
Patent abstract
A nonvolatile semiconductor memory device includes a first stacked structure in which a plurality of electrode layers are stacked on a substrate via insulating layers, a first resistance changing layer provided on a side surface of the first stacked structure and in contact with the first electrode layers, the first resistance changing layer having a resistance value changing on the basis of an applied voltage, a second electrode layer provided on a side surface of the first resistance changing layer, and a bit line provided on the first stacked structure and electrically connected to the second electrode layer.
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