Patent attributes
Semiconductor device packages formed in accordance with methods of packaging semiconductor dice in grid array-type semiconductor device packages using conventional lead frame or lead lock tape assembly equipment are disclosed. Circuitry-bearing structure having an electrically insulating layer that carries redistribution electrical connections having redistributed bond pads and conductive traces and which is supported from beneath by a support layer are configured for securing to the active surface of a semiconductor die. The support layer may comprise an electrically conductive material, which may act as a heat sink or as a ground plane for the packaged semiconductor device. A semiconductor device and a semiconductor assembly are also provided.
