Patent attributes
According to a preferred embodiment of the present invention, an analog memory includes a first to third memory blocks. Each of the first to third memory blocks includes a plurality of capacitive elements for storing electric charges corresponding to an input signal, an output line for transferring the electric charges, and a plurality of MOS transistors each for changing connection between the capacitive element and the output line. When a signal is outputted from the output line to a buffer circuit by sequentially connecting the capacitive element to the output line in the first memory block, all connections between the capacitive elements and the output line are disconnected in the second and third memory blocks with the output line of the first memory block and the output line of the second memory block connected.
