Patent attributes
Insulating films (13, 14) are formed on the surface of a semiconductor wafer (30) on the side on which a plurality of devices are formed. Then, conductor layers (15, 16) are formed to cover opening portions from which electrode pads (12) of each device are exposed. Furthermore, a resist layer (R2) is formed to have opening portions from which terminal formation portions of the conductor layer are exposed, and metal posts (17) are formed on the terminal formation portions of the conductor layer (16) using the resist layer (R2) as a mask. Then, thinning of the semiconductor wafer (30) is performed to a predetermined thickness by grinding the back surface thereof. Thereafter, the resist layer (R2) is removed; an unnecessary portion (15) of the conductor layer is further removed; sealing with sealing resin is performed with the top portions of the metal posts (17) being exposed; metal bumps are bonded to the top portions of the metal posts (17); and the semiconductor wafer is divided into each device.
