A memory device includes memory cells each having a recordable layer between two metal layers, each memory cell being constructed and designed to change from a first state to a second state upon application of an initialization signal, and change from the second state to a third state upon application of a write signal. For a voltage within a specified range that is applied across the two metal layers, the memory cell has a lower resistance in the first state than in the second state, and has a higher resistance in the second state than in the third state.