US Patent 7816956 Power-on reset circuit

A power-on reset circuit according to an embodiment of the present invention includes an input control unit configured to generate a default input signal in response to a power-on reset signal and a clock, a counting unit configured to perform a counting operation in response to the default input signal to generate a count offset signal, and a power-on reset unit configured to perform a counting operation in response to the count offset signal to generate the power-on reset signal.