Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Anatoli Bolotov0
Ivan Pavisic0
Alexander Andreev0
Date of Patent
October 19, 2010
0Patent Application Number
117572000
Date Filed
June 1, 2007
0Patent Primary Examiner
Patent abstract
A system for layout of a module in an integrated circuit layout pattern has a cell library and a cell placement system. The cell library includes a plurality of cells. The cell placement system is adapted to select one or more cells from the cell library and to locally place each selected cell within the module layout so that each cell pin of the selected cells and each port of the module layout occupies a unique vertical routing track within the module layout.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.