US Patent 7830158 Time-sloped capacitance measuring circuits and methods

Time-sloped capacitance measuring circuits use the time to ramp voltage signals between reference levels to determine an unknown capacitance, where the ramping time is determined by the cumulative whole number of clock cycles counted during voltage signal ramping over multiple ramp cycles. Measurement resolution can be improved by adjusting a starting voltage level for subsequent voltage signal ramps by an amount that compensates for incremental voltage ramping during a terminal clock cycle of a previous voltage signal ramp.