US Patent 7835185 Nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device in accordance with the present invention is provided with a plurality of memory cells of field effect transistor type, a source bias control circuit, and a drain bias control circuit. The source bias control circuit variably sets the potential of a source line connected in common to the sources of the plurality of memory cells at the time of write operation. The drain bias control circuit variably sets the potential of the drains of the plurality of memory cells at the time of write operation according to the potential of the source line.