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US Patent 7835265 High availability Ethernet backplane architecture

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Patent
Patent
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Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
0
Patent Number
78352650
Patent Inventor Names
Rong-Feng Chang0
Eric (Changhwa) Lin0
James Ching-Shau Yik0
Linghsiao Wang0
Date of Patent
November 16, 2010
0
Patent Application Number
102848560
Date Filed
October 31, 2002
0
Patent Primary Examiner
‌
Ayaz R Sheikh
0
Patent abstract

A high availability backplane architecture. The backplane system includes redundant node boards operatively communicating with redundant switch fabric boards. Uplink ports of the node boards are logically grouped into trunk ports at one end of the communication link with the switch fabric boards. The node boards and the switch fabric boards routinely perform link integrity checks when operating in a normal mode such that each can independently initiate failover to working ports when a link failure is detected. Link failure is detected either by sending a link heartbeat message after the link has had no traffic for a predetermined interval, or after receiving a predetermined consecutive number of invalid packets. Once the link failure is resolved, operation resumes in normal mode.

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