Among the various embodiments described is a method of detecting defects in a cell of an integrated circuit that analyzes exercising conditions applied to an input of the cell during a capture phase of testing with failed test patterns that produce an indication of a fault and that analyzes the exercising conditions that are applied during a capture phase of testing with observable passing patterns that do not provide an indication of a fault. From the analysis, true failing excitation conditions and passing excitation conditions can be determined and used to identify whether a defect is in the cell or on an interconnect wire of the integrated circuit.