US Patent 7836379 Method for computing buffer ECC

A system includes a receive module, a control module and a read module. The receive module receives a first block that includes first data, a first cyclic redundancy check (CRC) checksum, and a first error-correcting code (ECC) value. The first CRC checksum and the first ECC value include a logical block address (LBA). The control module generates a first derived CRC checksum based on the first data. The first derived CRC checksum does not include the LBA. The read module reads a second block from a parity disk. The second block includes parity data, a second CRC checksum, and a second ECC value. The second CRC checksum and the second ECC value include the LBA.