US Patent 7838421 Method of forming metal line of semiconductor device

A method of forming metal lines of a semiconductor device, comprising providing a semiconductor substrate in which a plurality of gates and junctions formed between the gates are included in a cell area and a peripheral area; forming an insulating layer over the semiconductor substrate including the gates; forming an etch protection layer over the insulating layer; etching the etch protection layer and the insulating layer, and gap-filling conductive material to form contact plugs contacting the junctions of the cell area; and, forming first metal lines contacting the contact plugs and forming second metal lines contacting the junctions of the peripheral area by etching the etch protection layer and the insulating layer.