Patent attributes
Embodiments relate to a semiconductor device and a method for manufacturing the device, which suppresses off-current by improving the problem of leakage current due to hump characteristics, making it possible to maximize the reliability of the device. Embodiments relate to a method for manufacturing a semiconductor device including forming a well having two ends in a semiconductor substrate. A shallow trench isolation (STI) is formed by etching both ends of the well and the semiconductor substrate adjacent both ends of the well. A gate oxide film and a photoresist film are formed over the upper surface of the semiconductor substrate including the STI. The photoresist film is patterned for an impurity ion implant into one side area including the edge of the side wall of the STI. A barrier area is formed by implanting an impurity ion into one side area including the side wall edge of the STI using the patterned photoresist film as a mask.
