US Patent 7864507 Capacitors with low equivalent series resistance
Patent 7864507 was granted and assigned to Tpl, Inc. on January, 2011 by the United States Patent and Trademark Office.
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Patent abstract
An electric double layer capacitor (EDLC) in a coin or button cell configuration having low equivalent series resistance (ESR). The capacitor comprises mesh or other porous metal that is attached via conducting adhesive to one or both the current collectors. The mesh is embedded into the surface of the adjacent electrode, thereby reducing the interfacial resistance between the electrode and the current collector, thus reducing the ESR of the capacitor.
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US Patent 07864507 Capacitors with low equivalent series resistance US Patent 7864507 Capacitors with low equivalent series resistance
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Patent Number
0786450700
Patent Number
786450700
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Official Website
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
078645070
Date of Patent
January 4, 2011
0Patent Application Number
118506330
Date Filed
September 5, 2007
0Official Website
Patent Primary Examiner
Edits on 23 Sep, 2022
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
078645070
Date of Patent
January 4, 2011
0Patent Application Number
118506330
Date Filed
September 5, 2007
0Official Website
Patent Primary Examiner
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US Patent 07864507 Capacitors with low equivalent series resistance
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07864507
Date of patent
January 4, 2011
Patent application number
11850633
Date Filed
September 5, 2007
Patent primary examiner
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