US Patent 7870330 Controller for refreshing memories

A memory utilizes a data refresh algorithm to preserve data integrity over disturbances caused by memory programming or erase operations. The memory device maintains a counter for each memory block or sector. When a memory block or sector is erased or programmed, the associated counter is set to a first value while other counters are incremented or decremented. Whenever a counter reaches a threshold value, the associated block or sector is refreshed. The threshold value is set to ensure that each block or sector is refreshed before data integrity is adversely affected by disturbances caused by repeated programming and erase operations.