US Patent 7882408 Real time feedback compensation of programmable logic memory

Memory performance in programmable logic is significantly increased by adjusting a timing of control signals sent to a memory to compensate for variations in process, voltage, or temperature. A calibration circuit can adjust the control signal timing, dynamically and automatically, to provide accurate and high performance memory operations. For example, timing settings for the control signals can be determined such that data written/read from the memory are accurate. The timing setting can also be changed to provide faster memory operations while still providing accuracy. A feedback system using a control block and a dummy mimicking concept are also provided.