US Patent 7892916 Semiconductor device and fabricating method thereof

An upper electrode layer is processed into plural electrode shapes with lithography and subsequent dry etching to pattern plural upper electrodes, followed by conducting an RTA treatment at a treatment temperature of a value in a range from 400° C. to 1000° C. and at an oxygen flow volume of a value in a range from 0.1 L/min to 100 L/min and, subsequently, by conducting an annealing treatment at a treatment temperature of 650° C. in an oxygen atmosphere for 60 minutes.