US Patent 7894236 Nonvolatile memory devices that utilize read/write merge circuits
Patent 7894236 was granted and assigned to SAMSUNG ELECTRONICS CO., LTD. on February, 2011 by the United States Patent and Trademark Office.
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An integrated circuit memory device includes an array of nonvolatile memory cells (e.g., variable resistance cells) having a first plurality of lines electrically coupled to memory cells therein. A read/write control circuit is provided. The read/write control circuit includes a read/write merge circuit and a column selection circuit. The read/write control circuit, which is configured to drive a selected one of the first plurality of lines with unequal write and read voltages during respective write and read operations, includes a compensating unit. This compensating unit is configured to provide a read compensation current to the selected one of the first plurality of lines circuit during the read operation.
US Patent 07894236 Nonvolatile memory devices that utilize read/write merge circuits US Patent 7894236 Nonvolatile memory devices that utilize read/write merge circuits
US Patent 07894236 Nonvolatile memory devices that utilize read/write merge circuits
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