US Patent 7895415 Cache sharing based thread control
Patent 7895415 was granted and assigned to Intel on February, 2011 by the United States Patent and Trademark Office.
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Apparatus and computing systems associated with cache sharing based thread control are described. One embodiment includes a memory to store a thread control instruction and a processor to execute the thread control instruction. The processor is coupled to the memory. The processor includes a first unit to dynamically determine a cache sharing behavior between threads in a multi-threaded computing system and a second unit to dynamically control the composition of a set of threads in the multi-threaded computing system. The composition of the set of threads is based, at least in part, on thread affinity as exhibited by cache-sharing behavior. The thread control instruction controls the operation of the first unit and the second unit.
US Patent 07895415 Cache sharing based thread control US Patent 7895415 Cache sharing based thread control
US Patent 07895415 Cache sharing based thread control
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