Patent attributes
A memory cell and a method of making the same, that includes insulating material deposited on a substrate, a bottom electrode formed within the insulating material, a plurality of insulating layers deposited above the bottom electrode and at least one of which acts as an intermediate insulating layer. Then defining a via in the insulating layers above the intermediate insulating layer, creating a channel for etch with a step spacer, defining a pore in the intermediate insulating layer, removing all insulating layers above the intermediate insulating layer, filling the entirety of the pore with phase change material, and forming an upper electrode above the phase change material. Additionally, the formation of bit line connections with the upper electrode.