US Patent 7903129 Image display device

A simple double-speed process circuit 60 outputs a video signal V1 twice at a double speed in units of frames. A time-division gradation process circuit 50 performs gradation level conversion on the video signal in order to distribute brightness for one frame cycle to two sub-frame cycles, i.e. first and second sub-frame cycles. An overshoot process circuit 40 performs gradation level conversion on the video signal in order to-emphasize a temporal change of the signal. A drive circuit 20 drives liquid crystal display elements 31 using a video signal V2 obtained through processing by the three circuits. A frame interpolation process circuit may be added to this circuit configuration or may be substituted for the simple double-speed process circuit 60. This makes it possible to improve moving image display performance, while making up for a lack of response speed of the display elements.