US Patent 7910976 High density NOR flash array architecture
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Patent abstract
In one embodiment of the invention, a memory includes wordline jogs and adjacent spacers. Spacers from different wordlines may contact one another on either side of a drain contact and consequently isolate and self-align the contact in the horizontal and vertical directions.
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Patent Inventor Names
Richard Fastow0
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Official Website
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US Patent 07910976 High density NOR flash array architecture US Patent 7910976 High density NOR flash array architecture
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Patent Number
079109760
Patent Number
79109760
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Patent Jurisdiction
Patent Number
079109760
Date of Patent
March 22, 2011
0Patent Application Number
118235180
Date Filed
June 28, 2007
0Official Website
Patent Primary Examiner
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US Patent 07910976 High density NOR flash array architecture
Infobox
Is a
Patent jurisdiction
Patent number
07910976
Date of patent
March 22, 2011
Patent application number
11823518
Date Filed
June 28, 2007
Patent primary examiner
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