US Patent 7911003 Semiconductor integrated circuit device

A semiconductor integrated circuit device including a semiconductor substrate and a MOS transistor having a source diffusion region and a drain diffusion region formed in the semiconductor substrate. A well is formed in the semiconductor substrate. A back gate diffusion region is defined in the vicinity of the source diffusion region or the drain diffusion region. The back gate diffusion region is of a conductivity type that is the same as that of the source diffusion region or the drain diffusion region. A potential control layer, arranged in the semiconductor substrate or under the well, controls the potential at the semiconductor substrate or the well.