US Patent 7911253 Hybrid clock network

Some of the embodiments of the present invention provide an integrated circuit device including a clock distribution network, the clock distribution network comprising an inner band, an outer band, and a clock distribution tree including a plurality of stages, each stage including a plurality of signal drivers, wherein all signal drivers of at least one stage of the clock distribution tree are placed in an area between the inner band and the outer band. Other embodiments are also described and claimed.