US Patent 7913129 Method of testing data paths in an electronic circuit

A method of testing an electronic circuit having a plurality of data transfer operators operating on memory resources defining a shared memory space is described. According to at least one embodiment, the shared memory space is initialized by writing data items to the shared memory space, and each data item is unique in the shared memory space. All or some of the shared memory space is partitioned into a plurality of disjoint memory blocks, the memory blocks being organized into one or more groups of blocks, each memory block belongs to one of the groups, and all memory blocks of the same group have the same size. A test scenario comprising at least one data transfer operation is executed, and the content of the shared memory space is verified.