US Patent 7913219 Orientation optimization method of 2-pin logic cell

In an orientation optimization, at least one signal chain path starting from a signal source and passing through a series of M 2-pin logic cells is located according to a netlist. An output of the Nth 2-pin logic cell in the series of M 2-pin logic cells, where N<M, is set as a gravity point to attract an input of the (N+1)th 2-pin logic cell, thereby optionally flipping the (N+1)th 2-pin logic cell.