US Patent 7915120 Method of fabricating non-volatile memory device

Provided is a method of fabricating a non-volatile semiconductor device. The method includes: forming a first hard mask layer over a substrate; etching the first hard mask layer and the substrate to form a plurality of isolation trenches extending in parallel to one another in a first direction; burying a dielectric layer in the isolation trenches to form a isolation layer; forming a plurality of floating gate mask patterns extending in parallel to one another in a second direction intersecting with the first direction over a resulting structure where the isolation layer is formed; etching the first hard mask layer by using the floating gate mask patterns as an etch barrier to form a plurality of island-shaped floating gate electrode trenches; and burying a conductive layer in the floating gate electrode trenches to form a plurality of island-shaped floating gate electrodes.