Patent attributes
This invention is directed to offer a technology that makes it possible to form desired bump electrodes easily when the bump electrodes are to be formed at locations lowered by a step. There is formed an isolation layer 12 to isolate each of bump electrode forming regions 11. The isolation layer 12 is a resist layer, for example, and is formed by exposure and development processes, for example. Each of the bump electrode forming regions 11 is surrounded by the isolation layer 12 and a protection layer 10 that covers a side surface of a semiconductor substrate 2. Then, a printing mask 16 that has openings 15 at locations corresponding to the bump electrode forming regions 11 is placed above the semiconductor substrate 2. Next, solder 17 in paste form is applied to the printing mask 16. Then the solder 17 is applied to a metal layer 9 by moving a squeeze 18 at a constant speed. Bump electrodes 19 are obtained by heating, melting and re-crystallizing the solder 17 after removing the printing mask 16.
