US Patent 7919799 Semiconductor device and semiconductor device manufacturing method
Patent 7919799 was granted and assigned to Renesas Electronics on April, 2011 by the United States Patent and Trademark Office.
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A semiconductor device including a semiconductor substrate having a logic formation region where a logic device is formed; a first impurity region formed in an upper surface of the semiconductor substrate in the logic formation region; a second impurity region formed in an upper surface of the semiconductor substrate in the logic formation region; a third impurity region formed in an upper surface of the first impurity region and having a conductivity type different from that of the second impurity region; a fourth region formed in an upper surface of the second impurity region and having a conductivity type different from that of the second impurity region; a first silicide film formed in an upper surface of the third impurity region; a second silicide film formed in an upper surface of the fourth impurity region and having a larger thickness than the first silicide film.
US Patent 07919799 Semiconductor device and semiconductor device manufacturing method US Patent 7919799 Semiconductor device and semiconductor device manufacturing method
US Patent 07919799 Semiconductor device and semiconductor device manufacturing method
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