US Patent 7924863 Device and method for processing data chunks

In a scheme for processing data chunks, MAC-PHY circuits are adapted to store data chunks of large data packets and to provide same to a shared memory unit across an interface controlled by a controller. A data transfer monitor is adapted to monitor the progress of such data provision and shared layer-two processors perform data chunk processing operations and data packet processing operations based upon such progress. A double data rate (DDR) controller, coupled between the shared memory unit and a DDR memory unit, provides data chunks from the first shared memory unit to the DDR memory unit.