Patent attributes
A trench semiconductor device is provided which ensures a reduced turn-on time. The semiconductor device (1) includes: a first epitaxial layer provided on a semiconductor substrate; a second epitaxial layer provided in contact with an upper surface of the first epitaxial layer and having a lower impurity concentration than the first epitaxial layer; a plurality of trenches provided in the second epitaxial layer as extending downward from an upper surface of the second epitaxial layer; a gate electrode embedded in each of the trenches; a source region extending downward from the upper surface of the second epitaxial layer along each of opposite side surfaces of the trench; a base region extending downward from a lower surface of the source region along each of the opposite side surfaces of the trench; and a base high concentration region provided adjacent the source region and the base region in spaced relation from the trench as extending downward from the upper surface of the second epitaxial layer to a greater depth than the base region, and having the same conductivity type as the base region and a higher impurity concentration than the base region.
