Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Kazuteru Nanba0
Hideo Ito0
Date of Patent
May 17, 2011
0Patent Application Number
117958420
Date Filed
January 5, 2006
0Patent Primary Examiner
Patent abstract
[PROBLEMS] To provide a semiconductor integrated circuit by which what has been referred to as two-pattern test is made possible without greatly increasing an occupying area. [MEANS FOR SOLVING PROBLEMS] The semiconductor integrated circuit is provided with a plurality of flip-flop circuits and selectors corresponding to each flip-flop circuit. Each flip-flop circuit is provided with a master latch and a slave latch connected to the master latch. The selector is electrically connected with the master latch of the flip-flop circuit to which the selector corresponds, and is also connected with the master latch of the flip-flop circuit other than the one to which the selector corresponds.
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