US Patent 7949909 Address controlling in the MBIST chain architecture
Patent 7949909 was granted and assigned to LSI Corporation on May, 2011 by the United States Patent and Trademark Office.
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Patent abstract
A memory collar includes a first circuit, a second circuit and a third circuit. The first circuit may be configured to generate a first control signal, a second control signal and a third control signal in response to one or more test commands. The second circuit may be configured to generate a fourth control signal in response to said third control signal and the fourth control signal. The third circuit may be configured to generate one or more address sequences. The one or more address sequences are presented to a memory during a test mode.
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Patent Inventor Names
Alexandre Andreev0
Anatoli Bolotov0
Mikhail Grinchuk0
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US Patent 07949909 Address controlling in the MBIST chain architecture US Patent 7949909 Address controlling in the MBIST chain architecture
Infobox
Patent Number
079499090
Patent Number
79499090
Edits on 28 Apr, 2023
Golden AI
Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
079499090
Date of Patent
May 24, 2011
0Patent Application Number
121835620
Date Filed
July 31, 2008
0Patent Primary Examiner
Edits on 7 Dec, 2021
Golden AI
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Infobox (+8 properties)
US Patent 07949909 Address controlling in the MBIST chain architecture
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07949909
Date of patent
May 24, 2011
Patent application number
12183562
Date Filed
July 31, 2008
Patent primary examiner
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