US Patent 7949970 Fast reduction of system models

Techniques are provided for fast reduction of a system model, such as fast parasitics reduction of an electrical design. Delta loops, which comprise three nodes connected by three edges, may be identified. The netlist can be annotated with the number of delta loops to which an edge belongs and a delta loop identifier. Delta loops that share an edge may be assigned the same identifier. Identifying delta loops may be based on the intersection of binary search trees that are based on the netlist. In one embodiment, a cost of removing a node from the netlist is determined. Based on the annotations to the edges connected to a node under consideration for removal, the total number of delta loops that are shared by pairs of edges is determined. Based, at least in part, on the total number of common delta loops, a cost is determined of removing the node.