US Patent 7949973 Methods of implementing multi-cycle paths in electronic circuits

Methods of implementing circuits while automatically taking multi-cycle paths into account. A processor-implemented method can include inputting a behavioral description of the circuit, a simulation test bench for the circuit, and a library that includes at least one synchronous element. The synchronous element includes code that, when simulated, outputs tracking information including a minimum number of clock cycles between state changes for terminals of the synchronous element. The behavioral description is synthesized to generate a netlist description of the circuit. The netlist description includes at least one instance of the synchronous element. The netlist description is simulated using the simulation test bench and the library. The simulation outputs a description of all multi-cycle paths in the netlist description based on the tracking information output by all instances of the synchronous element in the netlist description. This description can provide constraints for use when placing and routing the design.